New-technology Power MOSFET family from STMicroelectronics enables higher frequencies and lower losses in DC-DC supplies

STMicroelectronics has announced two new Power MOSFETs, intended for the most demanding DC-DC converter applications, which use the latest version of ST’s proprietary STripFET™ technology to deliver extremely low conduction and switching losses, up to 3W lower in a typical voltage regulator module, and to achieve the lowest figure of merit – FOM = Rds(on) x Gate Charge (Qg) – among comparable competitive devices.

In addition to the high efficiency, the new MOSFETs allow practical circuits to operate at higher-than-normal switching frequencies, enabling a reduction in the size of the circuit’s passive components. For example, a 10% increase in switching frequency can lead to a 10% reduction in passive components required by the output filter.

The STD60N3LH5 and STD85N3LH5 are the first in a new series of STripFET V devices which provide superior performance and increased efficiency as a result of low ON-resistance and significantly lower total gate charge. Both are 30V (BVDSS) devices. With gate charge (Qg) of just 8.8nC (nanocoulombs), and Rds(on) of 7.2 milliohms at 10V, the STD60N3LH5 is an ideal choice as a control FET in non-isolated DC-DC step-down converters. The 4.2 milliohm Rds(on) at 10V of the STD85N3LH5, with a Qg of 14nC, makes it an optimal choice as a synchronous FET. Both devices are produced in DPAK and IPAK packages and will be soon available in other package options including SO-8, PowerFLAT 3.3x3.3, PowerFLAT 6x5, and PolarPAK®. The new series of STripFET V devices are ideal for notebook, server, telecom and networking applications.

ST’s STripFET technology makes use of very high ‘equivalent cell density’ and smaller cell features to achieve extremely low ON-resistance and losses, while using less silicon area. STripFET V is the latest generation of this technology, achieving approximately 35% improvement in the critical indicator of silicon resistance and active area, plus some 25% reduction in total gate charge per active area, compared to the earlier generation.

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